riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%

git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Merge pull request #3 from AlvaroMarques/master

Kyle Laker · 2019-11-03 17:09 · fc10aa46ebe8af9578e9ec6c1e9a42624d99a26b

Added Control Status Registers and Instructions used for interrupts

 syntax/riscv.vim | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)