riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%

git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Add subi pseudo instruction

PrimmR · 2024-10-21 22:33 · d052793cb3bd2785e63d751fc3f871bc010b5e97

 syntax/riscv.vim | 1 +
 1 file changed, 1 insertion(+)

diff --git a/syntax/riscv.vim b/syntax/riscv.vim
index a37e882..9c14235 100644
--- a/syntax/riscv.vim
+++ b/syntax/riscv.vim
@@ -358,6 +358,7 @@ syntax match   riscvInstruction /\<vmv[1248]r\.v\>/
 
 " pseudo-instructions
 syntax keyword riscvInstruction li la lla lga
+syntax keyword riscvInstruction subi
 syntax keyword riscvInstruction nop mv
 syntax keyword riscvInstruction not neg negw
 syntax keyword riscvInstruction sext.b sext.h sext.w zext.b zext.h zext.w