riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%

git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Fix x register regex

Kyle Laker · 2019-02-01 22:09 · bb775092fd0ef0299c0d6a1181bc4b213c72c06a

Resolves #2

 syntax/riscv.vim | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/syntax/riscv.vim b/syntax/riscv.vim
index ae7ed19..d0438c0 100644
--- a/syntax/riscv.vim
+++ b/syntax/riscv.vim
@@ -19,7 +19,10 @@ syntax match  riscvLabel /\w\+:/ contains=risvLabelColon
 
 " Registers
 " Numbered registers
-syntax match riscvRegister /x([0-9]|[1-2][0-9]|3[0-1]/
+syntax match   riscvRegister /x[0-9]/
+syntax match   riscvRegister /x[1-2][0-9]/
+syntax match   riscvRegister /x3[0-1]/
+
 " Symbolic register names
 syntax keyword riscvRegister zero ra sp gp tp fp
 syntax match   riscvRegister /a[0-7]/