riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%

git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Fix highlighting of register names

Kyle Laker · 2019-02-02 00:18 · a4b43b3339c50e884bb54025d4dd9a07ae3e15ee

 syntax/riscv.vim | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/syntax/riscv.vim b/syntax/riscv.vim
index d0438c0..52ab73f 100644
--- a/syntax/riscv.vim
+++ b/syntax/riscv.vim
@@ -1,4 +1,4 @@
-" Maintainer: Kyle Laker
+" Maintainer: Kyle Laker <kyle@laker.email>
 " Last Change: 2019 Feb 1
 
 if exists("b:current_syntax")
@@ -19,16 +19,15 @@ syntax match  riscvLabel /\w\+:/ contains=risvLabelColon
 
 " Registers
 " Numbered registers
-syntax match   riscvRegister /x[0-9]/
-syntax match   riscvRegister /x[1-2][0-9]/
-syntax match   riscvRegister /x3[0-1]/
+syntax match   riscvRegister /\<x[0-9]\>/
+syntax match   riscvRegister /\<x[1-2][0-9]\>/
+syntax match   riscvRegister /\<x3[0-1]\>/
 
 " Symbolic register names
-syntax keyword riscvRegister zero ra sp gp tp fp
-syntax match   riscvRegister /a[0-7]/
-syntax match   riscvRegister /t[0-6]/
-syntax match   riscvRegister /s[0-9]/
-syntax match   riscvRegister /s1[0-1]/
+syntax keyword riscvRegister zero ra sp gp tp fp pc
+syntax keyword riscvRegister a0 a1 a2 a3 a4 a5 a6 a7
+syntax keyword riscvRegister t0 t1 t2 t3 t4 t5 t6
+syntax keyword riscvReigster s0 s1 s2 s3 s4 s5 s6 s7 s8 s9 s10 s11
 
 " Assembler directives
 syntax match riscvDirective "\.data"