riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%

git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Add csr* pseudo instructions

Yu Chien Peter Lin · 2023-06-06 03:01 · 6a956b66b33610aa74a956d200173a4dfb7cdff2

Move pseudo instructions to the new line and add missing
csrc & csrs.

Signed-off-by: Peter Lin <peterlin@qilai.dev>

 syntax/riscv.vim | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/syntax/riscv.vim b/syntax/riscv.vim
index 3a9f99f..850a1e6 100644
--- a/syntax/riscv.vim
+++ b/syntax/riscv.vim
@@ -138,7 +138,8 @@ syntax keyword riscvInstruction amomaxu.w amomaxu.d
 syntax keyword riscvInstruction amominu.w amominu.d
 
 " Zicsr
-syntax keyword riscvInstruction csrrw csrrs csrrc csrrwi csrrsi csrrci csrr csrw
+syntax keyword riscvInstruction csrrw csrrs csrrc csrrwi csrrsi csrrci
+syntax keyword riscvInstruction csrr csrw csrc csrs
 syntax keyword riscvInstruction csrwi csrsi csrci
 syntax keyword riscvInstruction frcsr fscsr frrm fsrm frflags fsflags
 syntax keyword riscvInstruction fsrmi fsflagsi