Nimbin[12]?Mirrors & Forks / riscv.vim / commits / 22937b1

riscv.vim git · master

RISC-V assembly syntax for vim

vim riscv assembly · first commit 2019-02-01 · last commit 2024-12-31 (1 year ago) · synced 3 days ago · upstream: github.com/laurelmay/riscv.vim

Vim Script 87.9% Markdown 12.1%
git clone https://git.christianimmanuel.de/mirrors-forks/riscv.vim.gitwget https://git.christianimmanuel.de/mirrors-forks/riscv.vim/archive/riscv.vim.tar.gz

Cleanup register regex

Kyle Laker · 2019-06-22 00:20 · 22937b1c726ddad07cba9a4e3eb1c777e21fe446

 syntax/riscv.vim | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/syntax/riscv.vim b/syntax/riscv.vim
index 70eb88e..7cbf370 100644
--- a/syntax/riscv.vim
+++ b/syntax/riscv.vim
@@ -19,9 +19,7 @@ syntax match  riscvLabel /\w\+:/ contains=risvLabelColon
 
 " Registers
 " Numbered registers
-syntax match   riscvRegister /\<x[0-9]\>/
-syntax match   riscvRegister /\<x[1-2][0-9]\>/
-syntax match   riscvRegister /\<x3[0-1]\>/
+syntax match   riscvRegister /\<x\([1-2]?[0-9]\|3[0-1]\)\>/
 
 " Symbolic register names
 syntax keyword riscvRegister zero ra sp gp tp fp pc